Figure 1. The CADET.
Super Strip (a.k.a. proto board, solderless breadboard)
There are several lab stations in EE 235, each of which supports groups of two or three people. (As much as possible, groups for this class will consist of two people.) Each station has a C.A.D.E.T. digital electronics trainer, proto boards, a logic probe, and wire and components for performing the assigned exercises. Some of these items will be provided as a "Lab Kit" which you will keep with you between laboratory sessions. The lab is used by other classes, so there is equipment present at each station which will not be used for this class.
Figure 1. The CADET.
Figure 2. CADET Layout.
The C.A.D.E.T. analog/digital trainer (hereafter referred to simply as the CADET) shown in figure 1 provides the electrical energy for constructed circuits. (Figure 2 shows the functional layout of the CADET.) It has a +5 Volt source (often designated Vcc) and a 0 Volt source (called ground and abbreviated GND). It also provides variable DC voltages between -15 Volts and +15 Volts. This course will use +5 Volts and ground. Do not allow components to be connected to other voltages unless explicitly called for in the lab instructions. The CADET has an on/off switch and a power indicator in the upper left corner.
The +5 V power source can provide up to 1 ampere of current with less than 5 mV of ac ripple.
The logic indicators are eight signal outputs which are pairs of light emitting diodes (LEDs). They are located in the upper right portion of the CADET. Red indicates "high" and green indicates "low". No light indicates no signal or a signal in the transition (undefined) region.
There is a switch to select between +5V (TTL) mode and CMOS mode. Unless you are told otherwise, make sure the switch is in the +5V position. The thresholds for TTL mode are 2.2V for high and 0.8V for low. In CMOS mode, the thresholds are 0.7*V and 0.3*V. The input impedance of the indicators is 100 Kohm.
The eight logic switches provide high and low signals. They are located in the lower left portion of the CADET. As with the indicators, there is a switch to select between +5V (TTL) and variable levels. Unless you are told otherwise, make sure that this switch is in the +5V position.
When a switch's position is changed, it physically bounces before settling into its new position. This has undesirable results such as multiple occurrences of a digit on a calculator or of an extra character on a computer terminal. Some circuits you will construct are also sensitive to this bouncing; in these cases debounced switches should be used. Some times there will be no need to be concerned with the bounce problem, then in those cases either kind of switch may be used.
Two debounced pushbutton switches are provided in the lower left portion of the CADET. Each switch provides both a normally closed (NC) and a normally open (NO) tie point to ground. Pushing the switch causes the NC connection to open and the NO connection to close. Releasing the switch causes the connections to return to their normal state. The actual implementation of the outputs of these switches is through the use of open collector output devices. So to obtain a positive output voltage, it is necessary to place a pull-up resistor between the output and Vcc. These outputs can sink up to 250 mA.
The TTL output is always a square wave and is not affected by the setting of the AMP control. The TTL output has rise and fall times that are 20 times faster than the regular square waves (25 ns vs. 0.5 µs).
The probe usually gets its power from the CADET via alligator clips. The red clip should be connected to the +5V banana jack in the upper right corner of the CADET while the black clip should be connected to the black banana jack (ground). The clip near the tip of the probe (if there is one) should be connected to ground near the circuit. The probe is used by touching the metallic tip to any electrical conductor in the circuit, often a pin of an integrated circuit.
The probe has one or more LEDs indicating the logical value of the voltage at the point of measurement is a 0 or a 1. If there are two LEDs, their operation is usually similar to the operation of the logic indicators on the CADET. Probes with only a single LED to indicate logic levels can use a variety of methods to indicate logic states. Many probes have a separate LED (usually labeled "pulse") to detect an oscillating value or a single pulse. The interpretation of the LEDs can be found on the probe or in the probe's instruction manual. For this course, the switches on the probe should always be set on Normal and TTL/LS.
The super strip provides a convenient means of constructing experimental circuits. The strip has two arrays of holes separated by a long (blank) channel, or gutter. Figure 2 illustrates a segment of such a strip. The holes are internally interconnected as shown. An integrated circuit chip is placed over the central channel so its pins make connection with the first column of holes on either side of the channel (for a smaller 0.3 inch ICs). This leaves the four remaining holes in each row available to make connections to other points. The outer vertical "rails" (shown on the right in figure 3) are usually used to supply Vcc and ground to the circuit while the inner horizontal "rails" are used for signal connections.
Figure 3. A Segment of a Super Strip.
These strips are appropriate for constructing experimental circuits that involve low frequencies (up to a few MHz). At higher frequencies, the large capacitance between the adjacent rows of the connected holes can seriously affect circuit operation.
To make connections to or between points on a proto board, use pieces of insulated solid wire of an appropriate diameter wire (good sizes usually are between #22 and #24 AWG). The insulation should be removed on both ends (leaving about three-eights of an inch of bare wire on the ends). Avoid twisting the ends or bending it sharply such that it does not fit easily into the superstrip or develops cracks that cause the wire to break under the insulation. To insert a connecting wire, push each end of the wire vertically all the way into a hole. A pair of long-nosed pliers are useful to help do this. Before leaving the lab, check the floor and the benchtop for any stray pieces of wire.
It is very important to wire a circuit neatly. Such a circuit is less likely to contain errors, it is easier to debug, and it is easier to explain to the instructor or to a colleague.
The following suggestions should help you with your wiring of circuits.
The integrated circuits used in lab look nearly the same. It is important to know how to tell them apart and how to locate pin 1. Each IC has a variety of information on its top which can include the manufacturer's name and location, a manufacturer's part number, and date of fabrication as well as the industry standard part number which is the item of primary interest to us. The TTL ICs we will be using belong to families from the 54xx/74xx series. These families include the units designed for the more severe military requirements, designated as 54xx, and a lower power family designated as 74LSxx. These families are internally electrically different with different specific parameters, but externally logically equivalent. For our purposes, we will treat them as if they were all the same. Thus, in a lab calling for a 7400 quad two-input NAND gate IC, any of the following ICs would be acceptable: 7400, 74LS00, 5400, or SN74LS00. The key point is that the 00 portion of the name matches.
Figure 4. Two ways of identifying pin 1.
Figure 4 shows common ways of designating pin 1. Sometimes a notch is present, sometimes a dot, and sometimes both. In constructing circuits, wiring errors can be reduced and debugging aided by orienting the ICs in the same direction on the superstrip.
Be gentle in inserting and removing ICs from the superstrip. Watch that pins do not get bent. Make sure that Vcc and ground connections are made to every IC and that they are made correctly.
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